VisSim/ECD includes support for all the F280x, F283x (Delfino) and F280xx (Piccolo) C2000 family. Since the peripherals are similar across the family, you simply change the target selector in the MCU Config dialog, VisSim abstract the differences between devices and generates proper code for the given target. There are many small differences between devices in the Defino and Piccolo family including peripheral enable bits, serial/SPI,I2C FIFO lengths, clock setup registers, external GPIO pin mappings etc. But VisSim handles the differences automatically so you can focus on algorithm development and tuning.
Piccolo ADC Unit
For the ADC unit, which is much changed and improved for Piccolo, VisSim provides a different ADC Config dialog that allows you to select the trigger for each ADC channel (unlike the older F280x and Delfino ADC unit which is divided into two 8 channel banks, and each bank can select a trigger).
New Floating Point Piccolo F2806x
These new parts are faster (80 MHZ), have floating point, on-chip USB, and more RAM and flash. VisSim will automatically exploit the new F2806x resources and features simply by selecting the proper target in the CPU list.
Efficient Code Generation
VisSim/ECD's ability to generate highly efficient code results in high sample rates, low jitter, and efficient use of flash and RAM. For example, two independent Sensorless Field Oriented Vector Control of 2 PMSM motors run at 56% of a 100 microsecond time slice (10 kHz sample rate) on a 60 MHz F28035 Piccolo device. The same program uses only 5.3k flash and 2.7k RAM (including 800 words of signal waveform capture buffer) on a 60 MHz F28035 Piccolo device. As a TI 3rd party partner, Visual Solutions has gained valuable access to TI technology to tune VisSim/ECD to make best use of TI processors and peripherals.
Supports the XDS100 Low Cost JTAG link
The VisSim JTAG hotLink directly supports the XDS100 low cost JTAG supplied with TI motor control and digital power kits. Support is also included for Spectrum Digital JTAG emulators
- VisSim/Fixed Point block set performs simulation and efficient code generation of scaled fixed-point operations like sin, cos, sqrt, atan2, FIR, and IIR; overflow and precision loss effects are easily seen and corrected at simulation time; auto-scaling speeds fixed-point development; in-line code generation creates fast target code
- Peripheral blocks to generate code for C2000 on-chip devices: 280x ePWM, eQEP, eCAP, ADC, GPIO, quadrature encoder, comparator, event capture, CAN 2.0, SCI(RS232,UART,serial port), SPI, McBSP, watchdog, and interrupts
- Full control of PWM including dynamic control of PWM period and phase, ADC start of conversion, trip zone, deadband intervals, action selection
- Interrupt-based queue drivers for serial(SCI), SPI, and McBSP; user selectable queue lengths and use of hardware FIFO result in lower system overhead
- Diagram-based interrupt handlers for XINT, ADC, PWM, and DMA
- Easy creation of background tasks; subsystem dialog to create a background task that runs at a user specified rate
- TI C2000 Digital Motor Control (DMC) block set supports simulation and code generation of efficient, fixed-point routines for Park and Clarke transforms, rotor speed and flux estimation, PID control, space vector waveform generation for AC Induction, and brushless DC motor control
- Automatic C code generation of production quality, fixed-point code; compile, link, and JTAG download
- Supported processors include TI MSP430 (all flavors), C2000 (all flavors) including F2808 and variations, F28027, F28035 (Piccolo), F28335(Delfino), LF2407, F2812, C5510, C6713, Intel x86 PC
- Retention of the VisSim GUI while algorithm executes on MCU lets you visualize interactive plots of MCU outputs and change DSP gains and parameters in real time
- VisSim Code Composer Studio v3.x (CCS) plug-in for automatic CCS project creation
- TI C2000 CAN bus support
- Serial-port-based LCD display support
- Efficient 7- and 14-segment LCD display support for MSP430; user table can customize segment assignments; auto conversion from scaled fixed-point to decimal display uses no floating point and no divide for maximum efficiency on MSP architecture
- Conditional execution of subsystems based on any Boolean condition, including occurrence of interrupt
- User control of execution order of parallel flows is done top down; subsystem contents are completely executed before the next block on given layer, which provides fine grain control necessary for hardware device access
- State transition block provides unlimited states and transition conditions; transition conditions are C expressions